QT2256 - 320 PXI - is designed as a Combination Board Tester capable of testing highly complex and dense PCBs employing various test techniques on a single platform. It can perform Board Level Functional Test through edge connectors of a PCB, and guided probe diagnostics utility to reliably repair Digital/Analog and Mixed Signal PCBs of various complexities for conventional PCBs.
It can perform as In –Circuit Device / Cluster test by configuring Pin Drivers to High Current Pin Driver mode and interface to the UUT either through Clips / Probes or nail bed. It has in-built 20MHz 12bit Analog Driver / sensors synchronized with digital drivers for covering analog / mixed signal devices.
Integrated Boundary Scan Test controller (Up to 2 Chains) and software package can be used to test today’s PCBs with high density / high pin count devices. Uses latest technology boundary Scan hardware with RAM based drivers / sensors in synchronization with Automated Test Equipment (ATE) digital and analog pin drivers.
To effectively test CPU based boards without excluding the CPU from the test, the system offers optional Qmax patented Bus Cycle Signature System. In-Circuit Emulator Support for testing DSP based Board Function.Parametric Measurement Units (PMU) enables testing of the DC parametric of device pins on the edge connector for input bias current, Fan out capacity and Tri-state leakage currents to further enhance fault coverage and avoid unwanted field returns. Optional AC Parametric Tests for propagation delay, rise / fall time and pulse width measurements.
The capabilities can be further enhanced with optional IEEE instrumentation or PXI based Instrumentation and control through TestDirector 6 software. Analog Highways and relay matrix modules are used in routing the test pin to external measurement IEEE or PXI Instruments of user choice.
Uses Virginia Panel Test adapter Interface for highly reliable Unit Under Test (UUT) Interface Panel provides for signal pins, Power (50A each) pins and RF connectors.The ATE is interfaced to an external Host PC using a 32 bit, 33MHz PCI interface card or PCI Express. It is a modular design with upgrade options. The basic system comes with 128 Universal Pin Drivers, Software programmable for High Pin Current Pin Driver or 50 Ohms source impedance, 8 Flying channels 4 Analog channels and 5 fixed UUT power supplies. It can be easily upgraded to 320 Digital Channels and with Programmable UUT power supplies, IEEE or PXI External Instrumentation, Bus Cycle Signature System, ICE and Integrated Boundary Scan Test.
CircuitTracer (Optional) This optional software package helps the user to trace the intra links between the pins of an IC and also the interlinks between pins of various ICs which can be accessed through appropriate test clips. It automatically generates the Netlists. The Netlist file is then converted to file formats, which are compatible to CAD software packages like ORCAD or EDWIN. This process helps in Reverse Engineering of the PCB i.e. to generate the Schematic Diagram / Circuit Diagram of the Board Under Test.
IDDE is an Optional Software Package which is extremely useful for Device Test Program Generation. IDDE stands for Integrated Device Development Environment using VHDL and PythonTD test languages. Complete with automatic fault simulation nad fault coverage report for every library digital device developed. Also included is GTPG whereuser can directly define the required test input waveforms for the Device Under Test or the entire Board Under Test graphically and if the expected Output waveforms are known to the user the same also can be defined. Otherwise the output from Known Good Board can be learnt and stored as master reference for future comparisons. This mode is extremely useful to test devices / simple boards without any need to write complex test programs.
Optional Library:Russian Libray / Military Part Code Library.
Boundary Scan Software:: Includes Chain detection, Chain integrity test, Device ID, User ID, Interconnect test in Interacive and additionally Interconnect test between JTAG pins and Physical test pin / edge connector, Functional test for non boundary scan devices in berween JTAG devices and between JTAG and edge connector devices including Guided probe back tracking in advanved Boundary Scan test software.
Bus Cycle Signature System (BCSS) Software:Learns DIgital signatures from a known good CPU based board to compare with that of a suspected board to find the fault up to node level in the CPU Kernal, without having to write compex TPS or use of expensive and complex simulation modules for CPUs.